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BCM4500
(R)
ADVANCED MODULATION SATELLITE RECEIVER
FEATURES *
All-digital satellite receiver
SUMMARY OF BENEFITS * Highly integrated solution provides universal frontend for * * * * * * * *
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256-kilobaud to 30-megabaud variable rate receiver Supports BPSK, QPSK, 8PSK, & 16QAM modulation Dual integrated 7-bit A/D converters Digital square-root Nyquist filters (a=0.2, 0.35) All-digital clock and carrier recovery 12-tap adaptive equalizer
*
Advanced modulation turbo FEC decoder
- High performance decoder approaches constrained capacity theoretical limits - Supports QPSK rates 1/4, 1/2 and 3/4 - 8PSK flexible code rate support including 2/3, 3/4, 5/6 and 8/9 - Supports 16QAM rate 3/4 - No external RAM support required - Reed-Solomon decoder; t=10
Complies with DVB/DIRECTV(R)/Digicipher IITM FEC decoder MPEG-2 or DIRECTV(R) output interface with output clock PLL On-chip microcontroller for acquisition and tracking On-chip BERT for BER testing Integrated DiSEqCTM (v2.0) transmitter and receiver 128-pin PQFP 3.3V I/O and analog operation 1.8V digital operation
* * * * * * * *
advanced modulation satellite systems and legacy QPSK systems in a single package. High-performance turbo code FEC enables 50% throughput increase over existing satellite channels within current link budgets within a single transponder. Advanced design architecture requires no external RAM for turbo FEC. Advanced modulation receiver maintains robust performance during low SNR operation. Full variable rate operation from 256-kilobaud to 30megabaud provides multiple operating points for optimal system deployment. Integrated microcontroller controls receiver operations including configuration, acquisition and performance monitoring. Host interface operates via high-level application program interface (API) to reduce host software development time and to simplify system integration. MPEG-2 or DIRECTV(R) output interface with PLL-generated data clock provides glueless integration with BCM7020 HD graphics and video subsystem. Highly integrated DiSEqCTM interface includes integrated analog components.
Advanced Modulation Satellite Receiver Set-Top Box
Memory
Conditional Access
BCM7020
HD Video Audio
BCM4500
Advanced Modulation Satellite Receiver
L-band
BCM3440 SatelliteTuner
HDTV MPEG-2 Transport DEMUX, Audio/ Video Decoder and Display Engine
Host CPU
OVERVIEW
RA_I
A/D
7 Phase/ Frequency Recovery 7 Variable Rate Demod
Nyquist
= 0.20, 0.35 12-tap FFE
Block Header Processor
Iterative Decoder
Outer RS Decoder t=10
RA_Q
A/D
Nyquist
= 0.20, 0.35 Viterbi Decoder Sync & Deinterleaver RS Decoder
M U X
DATA[7:0] CLK VALID SYNC ERR
AGC_CTRL
Acquisition/Tracking Loops and Clock Generation
Acquisition Microcontroller
MBus/SPI Interface
MICRO[4:0]
DISEQC
DiSEqC 2.0
The BCM4500 brings a new level of performance to the satellite television industry with the introduction of an integrated advanced modulation receiver and turbo FEC decoder. This breakthrough design provides 50% more throughput in the same satellite bandwidth at standard QPSK operating points while simultaneously improving BER performance beyond existing levels. A high performance turbo FEC code is implemented with all required on-chip RAM to move system operating points near the theoretical capacity limits. A Reed-Solomon outer code is also used to drive the BER beyond typical satellite 10E-11 limits. The BCM4500 is a single-chip digital satellite receiver supporting BPSK, QPSK, 8PSK and 16QAM modulations with iteratively (turbo) decoded error correction coding. It represents an industry milestone in terms of satellite system throughput and operating points. The BCM4500 also receives DVB, DIRECTV(R) and DigicipherTM II (DCII), QPSK signals to support legacy system operation. The BCM4500 contains dual 7-bit A/D converters, an all-digital variable rate BPSK/QPSK/8PSK/16QAM receiver, an advanced modulation turbo FEC decoder, and a DVB/DIRECTV/DCII compliant FEC
decoder. All required RAM is integrated and all required clocks are generated on-chip from a single reference crystal. Baseband IQ analog waveforms are sampled by the integrated 7-bit A/D converters, resampled by integrated interpolative digital filter banks, and filtered by dual square-root Nyquist filters. Optimized soft decisions are then fed into either a DVB/DIRECTV/DCII-compliant FEC decoder, or an advanced modulation turbo decoder. The final error-corrected output is delivered in MPEG-2 or DIRECTV transport format. The output clock is generated by an on-chip PLL for low-jitter operation and glueless integration with Broadcom's BCM7020 HD graphics and video subsystem. The BCM4500 also features a simplified user interface employing an onchip microcontroller for all system configuration, acquisition, control, and monitoring functions. The host interface to the device is via a simplified, high-level application programmer interface (API). The chip also contains an integrated DiSEqCTM 2.0 controller with integrated voltage regulator for two-way communication with LNBs. An on-chip BERT is provided to simplify system test and manufacturing.
Broadcom(R), the pulse logo, and Connecting everything(R) are trademarks of Broadcom Corporation and/ or its subsidiaries in the United States and certain other countries. All other trademarks mentioned are the property of their respective owners.
(R)
BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013
(c) 2003 by BROADCOM CORPORATION. All rights reserved. 4500-PB06-R 12/29/03
Phone: 949-450-8700 Fax: 949-450-8710 E-mail: info@broadcom.com Web: www.broadcom.com

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